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Hi-k Dielectric Metal Gate Integration Delays Introduction of FinFET
                                   

Semiconductor Fabtech

Monday, 05 February 2007

FinFETThough planar CMOS developments are still all the rage, FinFETs are being touted as the next possible required technology to push Moore's Law to its end! Towards that goal, SEMATECH will continue to develop channel materials for transistors for the 22nm node and beyond, according to the research organization.

"It appears there is still enough life left in planar scaling for the nearer term, especially with the incorporation of Ge into Si devices, but that three-dimensional devices and associated design capabilities will be needed to realize FinFET technology in the near future," said Raj Jammy, director of SEMATECH's Front End Processes (FEP) Division.

The program, as previously announced last year, was charged with examining non-planar CMOS device structures, including double gate FinFETs and associated process development to improve their feasibility.

"New channel materials are the direction we want to go," said Hsing-Huang Tseng, chief technologist of FEP and program manager, adding that options include silicon-germanium (Si-Ge), germanium (Ge), and more untested elements in the III-V columns of the periodic table. SEMATECH is investigating several variations of this approach, such as using silicon or silicon-germanium for NMOS and Ge or Si-Ge for PMOS channels; or III-V materials on Si platform for NMOS in the near future. These materials would be applied as ultra-thin epitaxial layers grown selectively on Si to minimize defectivity.

However, should high-k materials coupled with metal gates (HKMG) gain widespread adoption at the 32nm node, it is doubtful that FinFET techniques will emerge in the mainstream at the 22nm node, as the development costs of HKMG will need to be recouped over several node migrations.

The level of work required for process integration by the 22nm node is also being scrutinized, not least by SEMATECH researchers. The race would apparently be well underway to access timeframe feasibilities, let alone the technical breakthroughs required.

With FinFETs touted for the 45nm node as recently as last year's IEDM conference, SEMATECH would seem to be suggesting that the 22nm node is now more realistic with the claimed breakthroughs in HKMG integration efforts.