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Adapted from Design
News. Figure courtesy of SEMATECH.
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| 1. First, a 99.9999% pure silicon crystal ingot is
sliced into thin wafers. |
| 2. Polishing the wafer removes surface scratches and
impurities, leaving a near-perfect base for building chips. |
| 3. Portions of the silicon are chemically altered to
create the source and drain regions of the transistor, which control the flow
defined by photolithography, where the wafer is coated with a light-sensitive
material called photoresist. Next, light is shined through a patterned mask onto
a chip-size section of the wafer -- a process similar to printing a photograph
from a negative. A machine called a stepper repeats this process for each chip
on the wafer. |
| 4. The exposed areas of the photoresist harden. During
the development process, non-hardened photoresist is washed away. |
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| 5. Atoms of dopant materials -- such as boron or arsenic
-- are forced into an area by ion bombardment in a process called doping, aand
are "activated" by a thermal annealing step. The resist material blocks the dopants
from entering any areas where they are not intended to be. After ion implantation,
the hardened resist is stripped off, and the process is repeated for other types
of dopants implanted in different areas. In subsequent steps, a similar patterning
process is used, but the resist acts as an etch mask. |
| 6. Next, the gate of the transistor is formed by depositing
and patterning a layer of silicon dioxide (which forms the gate oxide) and then
a layer of polysilicon, which is then heavily doped. This polysilicon gate acts
as a "faucet" to turn the flow of electrons between the source and drain on and
off. |
| 7. The rest of the fabricaction steps involve forming
the "wires" that connect the gate, source and drain of the transistors to one
another and to the outside world. Layers of silicon dioxide -- a dielectric, or
insulator -- are deposited on the wafer using chemical vapor deposition (CVD).
During CVD processing, gases that contain atoms of the material to be deposited
react on the heated wafer surface, forming a thin film of solid material. Metals,
primarily aluminum, are deposited by the physical vapor deposition (PVD). During
PVD -- also called sputtering -- gas ions accelerate toward a "target" of the
material to be deposited. The ions chip off atoms of the target material, which
fall and accumulate on the wafer. |
| 8. Steps 3,4 and 5 are repeated to build up patterned
layers of silicon dioxide, metals and other materials to complete the circuit
design. A layer of conducting metal (usually aluminum) is deposited (CVD or PVD),
exposed (photolithography), and etched to form tiny metal interconnects. Complex
chips require several metal layers, with vertical connections between them called
vias. |
| 9. The wafer is cut up, or diced, to form chips. The
chips are put in packages, and a wirebonder electrically connects the chips to
the appropriate package pins or leads. |
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