The novelty of the design is that it uses an interfacial layer of tantalum pentoxide (Ta2O5) between the plug that connects to a MOS transistor and the phase-change film, which is a standard germanium antimony tellurium chalcogenide alloy, Renesas said. This has been engineered to prevent heat escaping through the plug and thus allowing resetting to an amorphous state to be achieved at lower power consumption.

In prototype phase-change memory cells structured this way the programming operation was a current of 100 microamps at a power supply voltage of 1.5 volts. The adhesion between the tantalum pentoxide interfacial layer and phase-change film has the potential to provide enhanced stability in memory cell fabrication, Renesas said.

In conventional phase-change memory it was necessary to heat the phase-change film material to past the melting point to return the film to the amorphous state, which required a current of 1 milliamp or more. In 2005 Hitachi and Renesas Technology developed a phase-change film made of oxygen-doped GeSbTe (germanium-antimony-tellurium), and succeeded in fabricating prototype memory cells with lower power requirements.

Hitachi and Renesas have developed the interfacial layer structure to overcome heating problems associated with this material allowing the cell to achieve low-power operation and fabrication stability at the same time, Renesas claimed. The tantalum pentoxide prevents heat diffusion from the phase-change film via the plug. As a result, the temperature rise in the phase-change film is rapid, and the melting point is reached using less power.

Phase-change memories, long researched but not yet commercially significant, employs heat generated by current and makes use of the difference in the electrical resistance of a film when in an high resistance amorphous state and in a low resistance crystalline state to represent a 1 and 0. Phase-change memory has the potential to be highly compact as well as providing faster programming and write speeds compared with other non-volatile memory types.