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NAND Flash cost, density and performance advantages for mobile handsets

Scott Beekman, Toshiba America Electronic Components, Inc.
Jun 25, 2008 (12:28 PM)


Higher resolution cameras, music, video and games are all driving the need for higher density, low cost data storage. NAND flash memory is excellent for high-density, low-cost and fast write speed data storage. As a result, the adoption of NAND in mobile phones continues to grow at an accelerated pace.

Within mobile phones, the use of NAND flash for improved data storage has grown in three areas:

Multi-chip packages
The historical MCP solution for basic talk-only mobile phones was low-density random access memory (RAM) + NOR. This solution continues to be used today, driven primarily by low-end mobile phones targeting emerging markets. Multimedia phones, however, have adopted NAND based MCP solutions due to the density, cost and write performance advantages of NAND flash.

One of these NAND-based MCP solutions is simply to add NAND flash for data storage to a traditional NOR-based MCP. An example would be Pseudo SRAM (PSRAM) + NOR + NAND, where code is executed directly out of the NOR, NAND is used for data storage, and PSRAM for working memory.

Another NAND-based MCP solution is to replace NOR altogether with DRAM + NAND (in which the DRAM is Low Power SDRAM). In this case, both code and data are stored in the NAND flash. When the mobile phone is turned on, the code is then shadowed (copied) from NAND to DRAM, and thus executed out of the DRAM. The tradeoff is that this takes additional boot up time when the phone is turned on. On the other hand, there are multiple advantages related to cost and simplification, and DRAM is excellent at fast code execution. This solution eliminates the need for NOR, which is more expensive per bit than NAND. Also, NAND flash and DRAM have to their advantage economies of scale as the two most widely used memory technologies. For these reasons, DRAM + NAND combinations are the fastest growing of the NAND-based MCP solutions.

As reflected in the following figure, Toshiba forecasts that over 50 percent of MCPs worldwide will incorporate NAND flash in 2008, up from roughly one-third in 2006. DRAM + NAND MCPs are projected to account for two-thirds of the NAND-based MCP demand by 2011.

Figure 1. NAND MCP growth within mobile phones


Package-On-Package (POP) technology is essentially an MCP stacked on top of a processor to save board space. This requires that the top memory POP be compatible with the bottom processor. The memory alternatives described for MCP also apply to POP; however, due to potentially tighter height restrictions, the maximum memory density that can be supported within POP is typically less than that of MCP.

High-density embedded storage
For many of today's multimedia phones and smartphones, storage densities supported within MCP are not enough. Thus, in addition to MCP, a separate high-density NAND storage device is also embedded within the phone. Whereas MCPs typically incorporate Single Level Cell (SLC) NAND densities ranging from 512 megabit (Mb)1 to 4 gigabit (Gb)2, the additional embedded storage chips support NAND densities ranging from 1 gigabyte (GB)3 to 16GB today using Multi Level Cell (MLC) NAND, which stores two or more bits per cell.

For these embedded storage chips, there are a variety of memory interfaces supported in the market, but these solutions all follow a basic concept as reflected in the following figure. MLC NAND die are used to achieve large density storage, cost effectively, in a small space. A controller is then incorporated with the MLC NAND device to manage error-code correction (ECC), wear leveling and bad block management requirements of the MLC NAND die, relieving the host processor of this task.

In the figure below, the interface is that of a standard SLC NAND, even though the device is using MLC NAND, thus simplifying design.

Other popular embedded storage interfaces include a high-speed MultiMediaCard interface (HS-MMC) interface, or an SD interface, which has been widely used to support removable SD cards.

High density storage MCPs
The embedded storage concept described above can also be incorporated within MCP for a one-chip solution, rather than two separate devices, though the maximum density supported is less than that of the two-chip solution. There are two basic approaches.

One solution is to simply add MLC NAND + controller to the dies of an MCP. For example, an MCP could include DRAM + SLC NAND, plus large density storage using MLC NAND + controller. Typically up to 2GB of storage can be incorporated within the MCP one-chip approach today. An example of this would be a GB MCP which utilizes DRAM + SLC NAND + Storage, where the Storage incorporates MLC NAND die with a controller that supports an SD interface.

Another solution is to utilize a NAND die + controller where the NAND die can be partitioned between SLC NAND and MLC NAND. mobileLBA NAND uses this approach. The SLC NAND die area is used for storage of application programs that require high reliability and performance, and the MLC NAND die area for data storage, all on one chip. The flexibility of this approach to partition SLC and MLC on the same die, means that a separate SLC NAND die is not required. This solution can be cost effectively implemented not only for MCP with large density storage, but also as a replacement to traditional lower density MCP using SLC NAND.


Ultimately, MCPs are expected to transition over time from SLC NAND based solutions to MLC NAND solutions such as that above for density and cost advantages. Thus, just as embedded storage and removable cards utilize an embedded controller to manage the MLC NAND die, so too will MCP rather than putting this task on the host processor.

Industry misconception
One current misconception is that there would be a total system cost savings if the host processor took on the task of managing the MLC NAND die, rather than using integrated flash + controller solutions from memory suppliers who essentially take on this task. After all, why pay for the added controller incorporated with the memory?

The challenge is that the complexity of managing the MLC NAND die is increasing with each generation of die shrinks. This is not simply a matter of the ECC requirements increasing, but of increasing complexity of NAND flash with successive design rule shrinks to smaller lithographies. Each supplier's MLC NAND has its own unique characteristics, and each supplier can optimize their own controller to harness the best performance out of their own MLC NAND die. With the speed at which NAND die shrinks are occurring, the developer of a host processor would have a great challenge to keep up with each and every suppliers' shrink and with optimized performance.

Essentially, customers are faced with the option of purchasing a host processor that can manage MLC NAND directly, but would likely be stuck purchasing the prior generation's MLC NAND die since that would be what the host controller could support. Ultimately, this means higher cost, and lesser performance, than simply purchasing from memory suppliers with their own controller-optimized MLC NAND solutions for the current generation MLC NAND die.

Removable storage
Another NAND flash growth area, and in fact, one of the largest in terms of bit growth within mobile phones, is use of card slots to enable additional removable storage. About 25-30% of handsets had card slots in 2006, over 50% are expected to include them in 2008, and projections reach 70-75% by 2010. microSD is the most popular format by far, and currently up to 8Gbytes are supported in the market today.

Today's multimedia phones require the density, cost, and write performance advantages that NAND flash offers. For this reason, NAND flash has become mainstream within mobile phones, including within multi-chip packages, through the growing use of additional high density embedded storage chips, and growth of card slots.

The use of MLC NAND as opposed to SLC NAND is already pervasive within high density embedded storage solutions such as those supporting an LBA, MMC or SD interface, or within microSD cards. So too, will MCPs start to incorporate more MLC NAND as the storage density requirements within MCPs continue to increase. Managing the MLC NAND will fall upon memory suppliers to achieve optimum performance with timely introduction to coincide with the latest MLC NAND die shrink technology.

1When used herein in relation to memory density, megabit and/or Mb means 1,024x1,024 = 1,048,576 bits. Usable capacity may be less. For details, please refer to applicable product specifications.
2When used herein in relation to memory density, gigabit and/or Gb means 1,024x1,024x1,024 = 1,073,741,824 bits. Usable capacity may be less. For details, please refer to applicable product specifications.
3When used herein in relation to memory density, gigabyte and/or GB means 1,024x1,024x1,024 = 1,073,741,824 bytes. Usable capacity may be less. For details, please refer to applicable product specifications.

About the Author
Scott Beekman is a senior business development manager for Toshiba America Electronic Components, Inc., responsible for memory products for mobile communications.