Semiconductor & Patent Expert Consulting

Litigation expert consultant and patent expert witness for process, device, and circuit of  Dynamic

 Ram (DRAM), Flash  (NAND, NOR, EEPROM), and Static Ram (SRAM) Memories,

 and Microprocessor, Logic, and Analog Devices

EE Times: Semi News
Updated: Samsung's 40-nm NAND uses high-k

SAN JOSE, Calif. — Seeking to regain the technical lead in NAND flash, Samsung Electronics Co., Ltd. announced Monday (Sept. 11) it has developed the industry's first 32-gigabit (Gbit) NAND flash memory, based on 40-nm design rules and the company's proprietary Charge Trap Flash (CTF) architecture.

Also based on what it claims to be the first implementation of high-k dielectric films for NAND, Samsung said the 32-Gbit NAND flash can be used in memory cards with densities of up to 64 gigabytes (GB). One 64-GB memory card is able to store over 64 hours of DVD resolution movies (about 40 movies) or 16,000 MP3 music files (1,340 hours), according to South Korea's Samsung, based here. .

Samsung claimed the development of the 40 nm-based NAND memory device uses CTF technology, which eliminates the need of the floating gate. Instead, the data is temporarily placed in a "holding chamber" of the non-conductive layer of the flash memory composed of silicon nitride, resulting in a higher level of reliability and better control of the storage current, Samsung said.

In each 32-Gb memory device, the height of the control gate in the CTF is only 20 percent of that of the control gate for a device with a typical floating gate structure, the company said.

The CTF-based NAND flash reduces inter-cell noise levels to a large extent and processing steps by 20 percent compared with those of the floating gate structure. Its single-gate structure also enables high scalability which will eventually improve manufacturing process technology for delivery of a 256-Gbit flash memory based on 20-nm design rules, according to Samsung.

"We have overcome the limit that the floating gate structure was faced with over the past 35 years," Hwang Chang-Gyu, President and CEO of Samsung's Semiconductor Business, told an unprecedented press conference here, referring to the floating gate technology introduced by Intel to the world in 1971.

Samsung said it plans to begin mass production of the 40-nm NAND flash in 2008, which will make possible the introduction of 32-GB MP3 players and 128-GB SSDs. It also targets to generate a total of $50 billion in sales revenue from the 40-nm NAND business from 2008 through 2012.

The company also predicted the CTF technology-based NAND flash would create an estimated $240 billion market worldwide over the upcoming decade, replacing the floating gate architecture and spearheading the industry's advancement into the era of the terameter technology expected after 2010.

The CTF design is enabled through the use of a so-called Tanos structure, which comprises tantalum (metal), aluminum oxide (high-k material), nitride, oxide and silicon layers. The use of a Tanos structure marks the first application of a metal layer coupled with a high-k material to the NAND device, Samsung claimed.

The Tanos CTF architecture, which serves as the foundation of the 40-nm 32-Gb CTF NAND flash was first revealed through a paper at the 2003 International Electron Devices Meeting (IEDM).

NAND flash has been the data storage device in virtually all digital cameras, USB drives and MP3players, as well as most multimedia handsets and smart phones. This year, NAND flash also is entering the PC computing environment. Samsung launched the first solid-state-disk (SSD) notebooks, called SENS Q3-SSD and SENS Q1-SSD in June.

Meanwhile, the introduction of a 40-nm manufacturing process for 32-Gbit NAND flash is interpreted to be the announcement of Samsung's seventh generation of NAND flash. That follows the "New Memory Growth Theory" of double-density growth every 12 months, which was first presented by Hwang at ISSCC 2002.

With the device, Samsung is attempting to regain the technical lead in NAND. In July, Intel and Micron, collaborators in flash memory, are sampling a 4-Gbit NAND flash memory fabricated in a 50-nanometer process technology, according to Micron Technology Inc. The devices were manufactured by IM Flash Technologies LLC a joint venture formed by Intel and Micron.

Only a few days earlier from the Intel-Micron announcement, the companies' main rival in flash memory, Samsung, announced that it had begun mass producing an 8-Gbit NAND flash-memory device made using 60-nm technology. At the time, that was Samsung's leading-edge NAND product.