Applied tips double-patterning breakthrough
Mark LaPedus - EETimes
(02/27/2007 5:40 PM EST)
SAN JOSE, Calif. —
Applied Materials Inc. here claimed two new breakthroughs in the
patterning arena for
chip designs. The chip-equipment giant rolled out a self-aligned double
patterning technology as well as a hardmask system.
The self-aligned double patterning technology enables 32-nm lines and
spaces on a 193-nm ''dry'' scanner, said Farhad Moghadam, senior vice
president and general manager of Applied Materials' Thin Films Group.
The techology is based on the Applied Producer APF (Advanced Patterning
Film) PECVD (Plasma-Enhanced Chemical Vapor Deposition) system.
The Applied Endura Metal Hardmask system with new Versa TTN PVD
technology is to deliver an advanced TiN1 hardmask film for patterning
copper/low k interconnects and high aspect ratio contact structures.
An integral component of a leading-edge patterning stack, this metal
hardmask film enables superior CD and profile control while preserving the
k-value of ultra-low k dielectric materials for increased chip speed and
The system is designed for high volume manufacturing at the 45- and 32-nm
nodes and provides a throughput of up to 85 wafers per hour, with 50 percent
lower cost of consumables than competitive systems.
Applied aims metal hardmask tool at ultralow k dielectric
By Ann Steffora Mutschler --
Electronic News, 2/27/2007
For patterning copper and low k interconnects as well as high aspect
ratio contact structures, Santa Clara, Calif.-based semiconductor
manufacturing equipment market leader
Applied Materials Inc. is
rolling out its
metal hardmask system.
The system contains new Versa titanium/titanium nitride (TTN) physical vapor
deposition (PVD) technology that the company believes delivers the
industry’s most advanced titanium nitride (TiN) hardmask film.
explained this metal hardmask film is meant to allow superior critical
dimension (CD) and profile control while preserving the k-value of ultralow
k dielectric materials for increased chip speed and yield.
Further, the system is designed for high volume manufacturing at the
45-nm and 32-nm process nodes, allows throughput of up to 85 wafers per
hour, with 50 percent lower cost of consumables than competitive systems.
Dr. Farhad Moghadam, senior VP and general manager of Applied’s thin
films group explained in a statement, “New patterning materials and
processes have become increasingly vital to fabricating high performance
logic and memory devices. For dielectric films with k-values less than or
equal to 2.5, the metal hardmask patterning sequence enables customers to
realize lower effective k-values by minimizing physical damage to the
dielectric and reducing the thickness requirement for the underlying barrier
“The high etch selectivity of the TiN film allows for a 5x thinner
patterning film stack compared to traditional photoresists, with thickness
uniformity and defectivity levels compatible with 32nm manufacturing,” he
The company says manufacturers have already qualified the TTN hardmask
technology for use in 65-nm manufacturing. The uniformity and productivity
advancements of the Applied Versa TTN are meant to ensure this technology
will be extendible to the 32-nm node and to double-patterning sequences.
Applied’s also offers advanced patterning films including the APF/DARC
film stack, which combines the APF amorphous carbon hardmask film with a
dielectric anti-reflective layer for advanced STI, gate and contact
Finally, Applied noted that by integrating this metal hardmask technology
with its Centura Enabler etch and Opus AdvantEdge metal etch tools, customer
can configure a comprehensive deposition and etch solution for damascene
structures with excellent CD uniformity, line edge and vertical feature
profiles with minimal low k damage, and high productivity.
|Metal hardmask for
patterning ultra-low-k dielectrics
|By Dr Mike Cooke
/ semiconductor Fabtech.org
Tuesday, 27 February 2007
|Applied Materials has a new titanium
nitride (TiN) hardmask film deposition technology for patterning
copper/low-k interconnects and high aspect ratio contact structures
aimed at 45nm and 32nm node production.
The Applied Versa TTN PVD system is designed for high volume
manufacturing at the 45nm and 32nm nodes. The hard metal mask is
delivered using Applied's Endura physical vapor deposition (PVD)
platform. The company says that it provides a throughput of up to 85
wafers per hour; with 50% lower consumable costs than competitive
A hardmask is used to protect areas during etch processing.
Applied's new film needs to meet tight critical dimension (CD) and
profile (line edge and vertical feature) control requirements while
not adding to the k-value of any ultra-low-k dielectric materials
used to increase on-chip signal speeds in the copper wiring or
affecting the yield of working devices from the production process.
For dielectrics with k≤2.5, a metal hardmask patterning scheme
preserves the k-value integrity by minimizing damage caused by the
plasma and strip processes, and reducing the thickness requirement
for the underlying barrier film. It is interesting that TiN is being
used since that material is also commonly used as a barrier layer
between the dielectric and copper metal wires. The TiN hardmask has
"significantly higher etch selectivity to the dielectric" compared
to photoresist, enabling a thinner patterning film stack. This means
that the etch process eats the dielectric, or even photoresist,
faster than the TiN.
Hardmasks (SiO2, Si3N4) are common in ion implant doping to improve
stopping power. Here, the purpose seems to be to improve the
patterning of the delicate low-k layers, a key step in copper
Dr. Farhad Moghadam, senior vice president and general manager of
Applied Materials' Thin Films Group, comments: "The high etch
selectivity of the TiN film allows for a 5x thinner patterning film
stack compared to traditional photoresists, with thickness
uniformity and defectivity levels compatible with 32nm
The TiN mask technology has been integrated with Applied's Centura
Enabler etch and Opus AdvantEdge metal etch systems. Applied reports
that leading manufacturers have already qualified Applied's TTN
hardmask technology for 65nm manufacturing and that uniformity and
productivity advancements ensure this technology will be extendible
to the 32nm node and to double-patterning lithography sequences.
Applied has a portfolio of patterning film stacks with hardmasks
used to improve processing such as the APF/DARC film stack, which
combines its APF amorphous carbon hardmask film with a dielectric
anti-reflective layer for advanced shallow trench isolation (STI),
gate and contact applications.